OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_15/] - Rev 223

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
223 Some code changed due to bug fixes. tadejm 7238d 00h /ethmac/tags/rel_15/
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7241d 22h /ethmac/tags/rel_15/
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.
mohor 7244d 23h /ethmac/tags/rel_15/
218 Typo error fixed. (When using Bist) mohor 7245d 01h /ethmac/tags/rel_15/
217 Bist supported. mohor 7245d 01h /ethmac/tags/rel_15/
216 Bist signals added. mohor 7245d 01h /ethmac/tags/rel_15/
215 Bist supported. mohor 7245d 02h /ethmac/tags/rel_15/
214 Signals for WISHBONE B3 compliant interface added. mohor 7245d 21h /ethmac/tags/rel_15/
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.
mohor 7245d 21h /ethmac/tags/rel_15/
212 Minor $display change. mohor 7245d 22h /ethmac/tags/rel_15/
211 Bist added. mohor 7245d 22h /ethmac/tags/rel_15/
210 BIST added. mohor 7245d 22h /ethmac/tags/rel_15/
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 7247d 01h /ethmac/tags/rel_15/
208 Virtual Silicon RAMs moved to lib directory tadej 7262d 19h /ethmac/tags/rel_15/
207 Virtual Silicon RAM support fixed tadej 7262d 19h /ethmac/tags/rel_15/
206 Virtual Silicon RAM added to the simulation. mohor 7262d 19h /ethmac/tags/rel_15/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7262d 20h /ethmac/tags/rel_15/
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7262d 20h /ethmac/tags/rel_15/
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 7262d 20h /ethmac/tags/rel_15/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 7265d 21h /ethmac/tags/rel_15/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.