URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_15/] - Rev 255

Rev	Log message	Author	Age	Path
232	fpga define added.	mohor	7854d 17h	/ethmac/tags/rel_15
231	Description of Core Modules added (figure).	mohor	7856d 19h	/ethmac/tags/rel_15
229	case changed to casex.	mohor	7860d 15h	/ethmac/tags/rel_15
227	Changed BIST scan signals.	tadejm	7860d 19h	/ethmac/tags/rel_15
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	7860d 21h	/ethmac/tags/rel_15
225	Some minor changes.	tadejm	7860d 21h	/ethmac/tags/rel_15
224	Signals for a wave window in Modelsim.	tadejm	7860d 22h	/ethmac/tags/rel_15
223	Some code changed due to bug fixes.	tadejm	7860d 22h	/ethmac/tags/rel_15
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	7864d 20h	/ethmac/tags/rel_15
219	txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file, TxDone and TxRetry are generated after the current WISHBONE access is finished.	mohor	7867d 21h	/ethmac/tags/rel_15