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246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7883d 00h /ethmac/tags/rel_15/
245 Rev 1.7. mohor 7883d 17h /ethmac/tags/rel_15/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7883d 19h /ethmac/tags/rel_15/
243 Late collision is not reported any more. tadejm 7884d 01h /ethmac/tags/rel_15/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7884d 16h /ethmac/tags/rel_15/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7884d 16h /ethmac/tags/rel_15/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7884d 16h /ethmac/tags/rel_15/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7884d 16h /ethmac/tags/rel_15/
238 Defines fixed to use generic RAM by default. mohor 7896d 20h /ethmac/tags/rel_15/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7899d 01h /ethmac/tags/rel_15/

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