OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_15/] - Rev 67

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8112d 18h /ethmac/tags/rel_15/
66 Testbench fixed, code simplified, unused signals removed. mohor 8113d 00h /ethmac/tags/rel_15/
65 Testbench fixed, code simplified, unused signals removed. mohor 8113d 00h /ethmac/tags/rel_15/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8113d 14h /ethmac/tags/rel_15/
63 RxAbort is connected differently. mohor 8113d 17h /ethmac/tags/rel_15/
62 RxAbort is an output. No need to have is declared as wire. mohor 8113d 17h /ethmac/tags/rel_15/
61 RxStartFrm cleared when abort or retry comes. mohor 8113d 19h /ethmac/tags/rel_15/
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8113d 19h /ethmac/tags/rel_15/
59 Changes that were lost when updating from 1.11 to 1.14 fixed. mohor 8113d 20h /ethmac/tags/rel_15/
58 File format changed. mohor 8113d 20h /ethmac/tags/rel_15/
57 Format of the file changed a bit. mohor 8113d 20h /ethmac/tags/rel_15/
56 File format fixed a bit. mohor 8113d 20h /ethmac/tags/rel_15/
55 Changed that were lost with last update put back to the file. mohor 8113d 20h /ethmac/tags/rel_15/
54 Addition of new module eth_addrcheck.v billditt 8114d 10h /ethmac/tags/rel_15/
53 Addition of new module eth_addrcheck.v billditt 8114d 10h /ethmac/tags/rel_15/
52 Modified for Address Checking,
addition of eth_addrcheck.v
billditt 8114d 11h /ethmac/tags/rel_15/
51 Added separate tests for Multicast, Unicast, Broadcast billditt 8114d 11h /ethmac/tags/rel_15/
50 checks destination address for Unicast, Multicast and Broadcast ops billditt 8114d 12h /ethmac/tags/rel_15/
49 HASH0 and HASH1 register read/write added. mohor 8116d 11h /ethmac/tags/rel_15/
48 RxOverRun added to statuses. mohor 8116d 14h /ethmac/tags/rel_15/
47 HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.
mohor 8116d 14h /ethmac/tags/rel_15/
46 HASH0 and HASH1 registers added. mohor 8116d 14h /ethmac/tags/rel_15/
45 Ethernet Datasheet added. mohor 8116d 20h /ethmac/tags/rel_15/
44 Ethernet Datasheet added to cvs. mohor 8116d 20h /ethmac/tags/rel_15/
43 Tx status is written back to the BD. mohor 8117d 22h /ethmac/tags/rel_15/
42 Rx status is written back to the BD. mohor 8120d 15h /ethmac/tags/rel_15/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8122d 17h /ethmac/tags/rel_15/
40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.
mohor 8123d 14h /ethmac/tags/rel_15/
39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.
mohor 8127d 18h /ethmac/tags/rel_15/
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8136d 20h /ethmac/tags/rel_15/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.