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[/] [ethmac/] [tags/] [rel_16] - Rev 250

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Rev Log message Author Age Path
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7850d 08h /ethmac/tags/rel_16
248 wb_rst_i is used for MIIM reset. mohor 7851d 08h /ethmac/tags/rel_16
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7854d 11h /ethmac/tags/rel_16
245 Rev 1.7. mohor 7855d 05h /ethmac/tags/rel_16
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7855d 07h /ethmac/tags/rel_16
243 Late collision is not reported any more. tadejm 7855d 12h /ethmac/tags/rel_16
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7856d 03h /ethmac/tags/rel_16
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7856d 03h /ethmac/tags/rel_16
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7856d 03h /ethmac/tags/rel_16
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7856d 03h /ethmac/tags/rel_16
238 Defines fixed to use generic RAM by default. mohor 7868d 07h /ethmac/tags/rel_16
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7870d 12h /ethmac/tags/rel_16
235 rev 4. mohor 7871d 03h /ethmac/tags/rel_16
234 Figure list assed to the revision 3. mohor 7871d 11h /ethmac/tags/rel_16
233 Revision 0.3 released. Some figures added. mohor 7871d 11h /ethmac/tags/rel_16
232 fpga define added. mohor 7876d 06h /ethmac/tags/rel_16
231 Description of Core Modules added (figure). mohor 7878d 08h /ethmac/tags/rel_16
229 case changed to casex. mohor 7882d 04h /ethmac/tags/rel_16
227 Changed BIST scan signals. tadejm 7882d 08h /ethmac/tags/rel_16
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7882d 10h /ethmac/tags/rel_16
225 Some minor changes. tadejm 7882d 10h /ethmac/tags/rel_16
224 Signals for a wave window in Modelsim. tadejm 7882d 11h /ethmac/tags/rel_16
223 Some code changed due to bug fixes. tadejm 7882d 11h /ethmac/tags/rel_16
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7886d 09h /ethmac/tags/rel_16
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7889d 10h /ethmac/tags/rel_16
218 Typo error fixed. (When using Bist) mohor 7889d 12h /ethmac/tags/rel_16
217 Bist supported. mohor 7889d 12h /ethmac/tags/rel_16
216 Bist signals added. mohor 7889d 12h /ethmac/tags/rel_16
215 Bist supported. mohor 7889d 13h /ethmac/tags/rel_16
214 Signals for WISHBONE B3 compliant interface added. mohor 7890d 08h /ethmac/tags/rel_16

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