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[/] [ethmac/] [tags/] [rel_17/] [bench/] [verilog/] - Rev 194

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Rev Log message Author Age Path
194 Full duplex tests modified and testbench bug repaired. tadej 7900d 04h /ethmac/tags/rel_17/bench/verilog/
192 Some additional reports added tadej 7902d 01h /ethmac/tags/rel_17/bench/verilog/
191 Bug repaired in eth_phy device tadej 7902d 01h /ethmac/tags/rel_17/bench/verilog/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).		 mohor 7902d 02h /ethmac/tags/rel_17/bench/verilog/
188 PHY changed. tadej 7902d 23h /ethmac/tags/rel_17/bench/verilog/
182 Full duplex test improved. tadej 7904d 01h /ethmac/tags/rel_17/bench/verilog/
181 MIIM test look better. mohor 7904d 04h /ethmac/tags/rel_17/bench/verilog/
180 Bench outputs data to display every 128 bytes. mohor 7906d 23h /ethmac/tags/rel_17/bench/verilog/
179 Beautiful tests merget together mohor 7907d 00h /ethmac/tags/rel_17/bench/verilog/
178 Rearanged testcases mohor 7907d 00h /ethmac/tags/rel_17/bench/verilog/
177 Bug in MIIM fixed. mohor 7907d 04h /ethmac/tags/rel_17/bench/verilog/
170 Headers changed. mohor 7907d 06h /ethmac/tags/rel_17/bench/verilog/
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7907d 07h /ethmac/tags/rel_17/bench/verilog/
158 Typo fixed. mohor 7912d 03h /ethmac/tags/rel_17/bench/verilog/
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7914d 08h /ethmac/tags/rel_17/bench/verilog/
156 Valid testbench. mohor 7914d 08h /ethmac/tags/rel_17/bench/verilog/
155 Minor changes. mohor 7914d 08h /ethmac/tags/rel_17/bench/verilog/
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 7957d 01h /ethmac/tags/rel_17/bench/verilog/
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 7959d 02h /ethmac/tags/rel_17/bench/verilog/
117 Clock mrx_clk set to 2.5 MHz. mohor 7963d 05h /ethmac/tags/rel_17/bench/verilog/

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