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[/] [ethmac/] [tags/] [rel_17/] [rtl/] [verilog/] - Rev 214

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Rev Log message Author Age Path
146 CarrierSenseLost status is not set when working in loopback mode. mohor 7909d 10h /ethmac/tags/rel_17/rtl/verilog/
145 Defines for control registers added (ETH_TXCTRL and ETH_RXCTRL). mohor 7909d 10h /ethmac/tags/rel_17/rtl/verilog/
143 Only values smaller or equal to 0x80 can be written to TX_BD_NUM register.
r_TxEn and r_RxEn depend on the limit values of the TX_BD_NUMOut.
mohor 7925d 13h /ethmac/tags/rel_17/rtl/verilog/
141 Syntax error fixed. mohor 7928d 06h /ethmac/tags/rel_17/rtl/verilog/
140 Syntax error fixed. mohor 7928d 06h /ethmac/tags/rel_17/rtl/verilog/
139 Synchronous reset added to all registers. Defines used for width. r_MiiMRst
changed from bit position 10 to 9.
mohor 7928d 06h /ethmac/tags/rel_17/rtl/verilog/
138 Synchronous reset added. mohor 7928d 07h /ethmac/tags/rel_17/rtl/verilog/
137 Defines for register width added. mii_rst signal in MIIMODER register
changed.
mohor 7928d 07h /ethmac/tags/rel_17/rtl/verilog/
136 Parameter ResetValue changed to capital letters. mohor 7928d 16h /ethmac/tags/rel_17/rtl/verilog/
134 Register TX_BD_NUM is changed so it contains value of the Tx buffer descriptors. No
need to multiply or devide any more.
mohor 7930d 09h /ethmac/tags/rel_17/rtl/verilog/

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