URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_17/] [rtl/] [verilog/] [eth_top.v] - Rev 250

Rev	Log message	Author	Age	Path
70	Small fixes.	mohor	8112d 02h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
68	Registered trimmed. Unused registers removed.	mohor	8113d 23h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8114d 00h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
65	Testbench fixed, code simplified, unused signals removed.	mohor	8114d 06h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
63	RxAbort is connected differently.	mohor	8114d 23h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
59	Changes that were lost when updating from 1.11 to 1.14 fixed.	mohor	8115d 01h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
52	Modified for Address Checking, addition of eth_addrcheck.v	billditt	8115d 16h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
47	HASH0 and HASH1 registers added. Registers address width was changed to 8 bits.	mohor	8117d 20h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
43	Tx status is written back to the BD.	mohor	8119d 03h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v
42	Rx status is written back to the BD.	mohor	8121d 20h	/ethmac/tags/rel_17/rtl/verilog/eth_top.v