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[/] [ethmac/] [tags/] [rel_17] - Rev 238

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Rev Log message Author Age Path
238 Defines fixed to use generic RAM by default. mohor 7868d 20h /ethmac/tags/rel_17
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7871d 01h /ethmac/tags/rel_17
235 rev 4. mohor 7871d 16h /ethmac/tags/rel_17
234 Figure list assed to the revision 3. mohor 7872d 00h /ethmac/tags/rel_17
233 Revision 0.3 released. Some figures added. mohor 7872d 00h /ethmac/tags/rel_17
232 fpga define added. mohor 7876d 19h /ethmac/tags/rel_17
231 Description of Core Modules added (figure). mohor 7878d 21h /ethmac/tags/rel_17
229 case changed to casex. mohor 7882d 17h /ethmac/tags/rel_17
227 Changed BIST scan signals. tadejm 7882d 21h /ethmac/tags/rel_17
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7882d 22h /ethmac/tags/rel_17
225 Some minor changes. tadejm 7882d 23h /ethmac/tags/rel_17
224 Signals for a wave window in Modelsim. tadejm 7883d 00h /ethmac/tags/rel_17
223 Some code changed due to bug fixes. tadejm 7883d 00h /ethmac/tags/rel_17
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7886d 22h /ethmac/tags/rel_17
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7889d 23h /ethmac/tags/rel_17
218 Typo error fixed. (When using Bist) mohor 7890d 01h /ethmac/tags/rel_17
217 Bist supported. mohor 7890d 01h /ethmac/tags/rel_17
216 Bist signals added. mohor 7890d 01h /ethmac/tags/rel_17
215 Bist supported. mohor 7890d 01h /ethmac/tags/rel_17
214 Signals for WISHBONE B3 compliant interface added. mohor 7890d 21h /ethmac/tags/rel_17

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