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[/] [ethmac/] [tags/] [rel_18/] - Rev 124

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Rev	Log message	Author	Age	Path
124	Define ETH_MIIMODER_RST corrected to 0x00000400.	mohor	7954d 07h	/ethmac/tags/rel_18/
122	ethernet spram added. So far a generic ram and xilinx RAMB4 are used.	mohor	7956d 07h	/ethmac/tags/rel_18/
121	gsr added for use when ETH_XILINX_RAMB4 define is set.	mohor	7956d 08h	/ethmac/tags/rel_18/
120	Unused files removed.	mohor	7956d 09h	/ethmac/tags/rel_18/
119	Ram , used for BDs changed from generic_spram to eth_spram_256x32.	mohor	7956d 09h	/ethmac/tags/rel_18/
118	ShiftEnded synchronization changed.	mohor	7959d 23h	/ethmac/tags/rel_18/
117	Clock mrx_clk set to 2.5 MHz.	mohor	7960d 10h	/ethmac/tags/rel_18/
116	Testing environment also includes traffic cop, memory interface and host interface.	mohor	7960d 10h	/ethmac/tags/rel_18/
115	RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset.	mohor	7961d 08h	/ethmac/tags/rel_18/
114	EXTERNAL_DMA removed. External DMA not supported.	mohor	7962d 05h	/ethmac/tags/rel_18/
113	RxPointer bug fixed.	mohor	7968d 21h	/ethmac/tags/rel_18/
112	Previous bug wasn't succesfully removed. Now fixed.	mohor	7969d 11h	/ethmac/tags/rel_18/
111	Master state machine had a bug when switching from master write to master read.	mohor	7970d 00h	/ethmac/tags/rel_18/
110	m_wb_cyc_o signal released after every single transfer.	mohor	7970d 03h	/ethmac/tags/rel_18/
109	Comment removed.	mohor	7970d 04h	/ethmac/tags/rel_18/
108	Testbench supports unaligned accesses.	mohor	8037d 14h	/ethmac/tags/rel_18/
107	TX_BUF_BASE changed.	mohor	8037d 14h	/ethmac/tags/rel_18/
106	Outputs registered. Reset changed for eth_wishbone module.	mohor	8037d 14h	/ethmac/tags/rel_18/
105	Compiler directives added. Tx and Rx fifo size incremented. A "late collision" bug fixed.	mohor	8046d 15h	/ethmac/tags/rel_18/
104	FCS should not be included in NibbleMinFl.	mohor	8048d 09h	/ethmac/tags/rel_18/

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Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_18/] - Rev 124

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