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[/] [ethmac/] [tags/] [rel_18/] - Rev 257

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257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.		 mohor 7843d 11h /ethmac/tags/rel_18
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7843d 11h /ethmac/tags/rel_18
255 TPauseRq synchronized to tx_clk. mohor 7843d 11h /ethmac/tags/rel_18
254 Temp version. mohor 7844d 15h /ethmac/tags/rel_18
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7844d 17h /ethmac/tags/rel_18
252 Just some updates. tadejm 7844d 18h /ethmac/tags/rel_18
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7844d 18h /ethmac/tags/rel_18
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7844d 18h /ethmac/tags/rel_18
248 wb_rst_i is used for MIIM reset. mohor 7845d 18h /ethmac/tags/rel_18
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7848d 21h /ethmac/tags/rel_18
245 Rev 1.7. mohor 7849d 15h /ethmac/tags/rel_18
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7849d 17h /ethmac/tags/rel_18
243 Late collision is not reported any more. tadejm 7849d 22h /ethmac/tags/rel_18
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7850d 13h /ethmac/tags/rel_18
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7850d 13h /ethmac/tags/rel_18
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7850d 13h /ethmac/tags/rel_18
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7850d 13h /ethmac/tags/rel_18
238 Defines fixed to use generic RAM by default. mohor 7862d 17h /ethmac/tags/rel_18
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7864d 23h /ethmac/tags/rel_18
235 rev 4. mohor 7865d 13h /ethmac/tags/rel_18
234 Figure list assed to the revision 3. mohor 7865d 21h /ethmac/tags/rel_18
233 Revision 0.3 released. Some figures added. mohor 7865d 22h /ethmac/tags/rel_18
232 fpga define added. mohor 7870d 17h /ethmac/tags/rel_18
231 Description of Core Modules added (figure). mohor 7872d 18h /ethmac/tags/rel_18
229 case changed to casex. mohor 7876d 15h /ethmac/tags/rel_18
227 Changed BIST scan signals. tadejm 7876d 19h /ethmac/tags/rel_18
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7876d 20h /ethmac/tags/rel_18
225 Some minor changes. tadejm 7876d 20h /ethmac/tags/rel_18
224 Signals for a wave window in Modelsim. tadejm 7876d 21h /ethmac/tags/rel_18
223 Some code changed due to bug fixes. tadejm 7876d 22h /ethmac/tags/rel_18

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