OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_18/] - Rev 257

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.		 mohor 7829d 04h /ethmac/tags/rel_18
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7829d 04h /ethmac/tags/rel_18
255 TPauseRq synchronized to tx_clk. mohor 7829d 04h /ethmac/tags/rel_18
254 Temp version. mohor 7830d 08h /ethmac/tags/rel_18
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7830d 10h /ethmac/tags/rel_18
252 Just some updates. tadejm 7830d 11h /ethmac/tags/rel_18
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7830d 11h /ethmac/tags/rel_18
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7830d 11h /ethmac/tags/rel_18
248 wb_rst_i is used for MIIM reset. mohor 7831d 11h /ethmac/tags/rel_18
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7834d 14h /ethmac/tags/rel_18
245 Rev 1.7. mohor 7835d 08h /ethmac/tags/rel_18
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7835d 10h /ethmac/tags/rel_18
243 Late collision is not reported any more. tadejm 7835d 15h /ethmac/tags/rel_18
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7836d 06h /ethmac/tags/rel_18
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7836d 06h /ethmac/tags/rel_18
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7836d 06h /ethmac/tags/rel_18
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7836d 06h /ethmac/tags/rel_18
238 Defines fixed to use generic RAM by default. mohor 7848d 10h /ethmac/tags/rel_18
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7850d 16h /ethmac/tags/rel_18
235 rev 4. mohor 7851d 06h /ethmac/tags/rel_18

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.