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[/] [ethmac/] [tags/] [rel_19/] [rtl/] [verilog/] [timescale.v] - Rev 22

Rev	Log message	Author	Age	Path
22	eth_timescale.v changed to timescale.v This is done because of the simulation of the few cores in a one joined project.	mohor	8229d 03h	/ethmac/tags/rel_19/rtl/verilog/timescale.v