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Rev Log message Author Age Path
122 ethernet spram added. So far a generic ram and xilinx RAMB4 are used. mohor 6265d 03h /ethmac/tags/rel_2/
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 6265d 03h /ethmac/tags/rel_2/
120 Unused files removed. mohor 6265d 04h /ethmac/tags/rel_2/
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 6265d 04h /ethmac/tags/rel_2/
118 ShiftEnded synchronization changed. mohor 6268d 18h /ethmac/tags/rel_2/
117 Clock mrx_clk set to 2.5 MHz. mohor 6269d 05h /ethmac/tags/rel_2/
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 6269d 05h /ethmac/tags/rel_2/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 6270d 03h /ethmac/tags/rel_2/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 6271d 00h /ethmac/tags/rel_2/
113 RxPointer bug fixed. mohor 6277d 16h /ethmac/tags/rel_2/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 6278d 06h /ethmac/tags/rel_2/
111 Master state machine had a bug when switching from master write to
master read.
mohor 6278d 19h /ethmac/tags/rel_2/
110 m_wb_cyc_o signal released after every single transfer. mohor 6278d 22h /ethmac/tags/rel_2/
109 Comment removed. mohor 6278d 23h /ethmac/tags/rel_2/
108 Testbench supports unaligned accesses. mohor 6346d 09h /ethmac/tags/rel_2/
107 TX_BUF_BASE changed. mohor 6346d 09h /ethmac/tags/rel_2/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 6346d 09h /ethmac/tags/rel_2/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 6355d 10h /ethmac/tags/rel_2/
104 FCS should not be included in NibbleMinFl. mohor 6357d 04h /ethmac/tags/rel_2/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 6357d 05h /ethmac/tags/rel_2/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 6357d 05h /ethmac/tags/rel_2/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 6357d 05h /ethmac/tags/rel_2/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 6357d 05h /ethmac/tags/rel_2/
99 Document revised. mohor 6364d 04h /ethmac/tags/rel_2/
98 Document revised. mohor 6364d 05h /ethmac/tags/rel_2/
97 Small typo fixed. lampret 6381d 03h /ethmac/tags/rel_2/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 6385d 03h /ethmac/tags/rel_2/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 6385d 06h /ethmac/tags/rel_2/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 6385d 06h /ethmac/tags/rel_2/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 6390d 04h /ethmac/tags/rel_2/

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