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[/] [ethmac/] [tags/] [rel_2/] [rtl/] - Rev 90

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Rev Log message Author Age Path
90 casex changed with case, fifo reset changed. mohor 8083d 15h /ethmac/tags/rel_2/rtl
88 rx_fifo was not always cleared ok. Fixed. mohor 8093d 12h /ethmac/tags/rel_2/rtl
87 Status was not latched correctly sometimes. Fixed. mohor 8093d 14h /ethmac/tags/rel_2/rtl
86 Big Endian problem when sending frames fixed. mohor 8094d 21h /ethmac/tags/rel_2/rtl
85 Log info was missing. mohor 8100d 07h /ethmac/tags/rel_2/rtl
84 LinkFail signal was not latching appropriate bit. mohor 8100d 07h /ethmac/tags/rel_2/rtl
83 MAC address recognition was not correct (bytes swaped). mohor 8100d 07h /ethmac/tags/rel_2/rtl
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8100d 09h /ethmac/tags/rel_2/rtl
80 Small fixes for external/internal DMA missmatches. mohor 8104d 11h /ethmac/tags/rel_2/rtl
79 RetryCntLatched was unused and removed from design mohor 8104d 11h /ethmac/tags/rel_2/rtl
78 WB_SEL_I was unused and removed from design mohor 8104d 11h /ethmac/tags/rel_2/rtl
77 Interrupts changed mohor 8104d 11h /ethmac/tags/rel_2/rtl
76 Interrupts changed in the top file mohor 8104d 11h /ethmac/tags/rel_2/rtl
75 r_Bro is used for accepting/denying frames mohor 8104d 11h /ethmac/tags/rel_2/rtl
74 Reset values are passed to registers through parameters mohor 8104d 11h /ethmac/tags/rel_2/rtl
73 Number of interrupts changed mohor 8104d 12h /ethmac/tags/rel_2/rtl
72 Retry is not activated when a Tx Underrun occured mohor 8108d 15h /ethmac/tags/rel_2/rtl
70 Small fixes. mohor 8112d 17h /ethmac/tags/rel_2/rtl
69 Define missmatch fixed. mohor 8113d 14h /ethmac/tags/rel_2/rtl
68 Registered trimmed. Unused registers removed. mohor 8114d 14h /ethmac/tags/rel_2/rtl

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