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Rev Log message Author Age Path
245 Rev 1.7. mohor 6474d 01h /ethmac/tags/rel_20/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6474d 04h /ethmac/tags/rel_20/
243 Late collision is not reported any more. tadejm 6474d 09h /ethmac/tags/rel_20/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6475d 00h /ethmac/tags/rel_20/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6475d 00h /ethmac/tags/rel_20/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6475d 00h /ethmac/tags/rel_20/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6475d 00h /ethmac/tags/rel_20/
238 Defines fixed to use generic RAM by default. mohor 6487d 04h /ethmac/tags/rel_20/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6489d 09h /ethmac/tags/rel_20/
235 rev 4. mohor 6490d 00h /ethmac/tags/rel_20/
234 Figure list assed to the revision 3. mohor 6490d 08h /ethmac/tags/rel_20/
233 Revision 0.3 released. Some figures added. mohor 6490d 08h /ethmac/tags/rel_20/
232 fpga define added. mohor 6495d 03h /ethmac/tags/rel_20/
231 Description of Core Modules added (figure). mohor 6497d 05h /ethmac/tags/rel_20/
229 case changed to casex. mohor 6501d 01h /ethmac/tags/rel_20/
227 Changed BIST scan signals. tadejm 6501d 05h /ethmac/tags/rel_20/
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 6501d 06h /ethmac/tags/rel_20/
225 Some minor changes. tadejm 6501d 07h /ethmac/tags/rel_20/
224 Signals for a wave window in Modelsim. tadejm 6501d 08h /ethmac/tags/rel_20/
223 Some code changed due to bug fixes. tadejm 6501d 08h /ethmac/tags/rel_20/

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