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[/] [ethmac/] [tags/] [rel_20/] - Rev 89

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Rev Log message Author Age Path
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8111d 00h /ethmac/tags/rel_20
88 rx_fifo was not always cleared ok. Fixed. mohor 8116d 23h /ethmac/tags/rel_20
87 Status was not latched correctly sometimes. Fixed. mohor 8117d 01h /ethmac/tags/rel_20
86 Big Endian problem when sending frames fixed. mohor 8118d 08h /ethmac/tags/rel_20
85 Log info was missing. mohor 8123d 18h /ethmac/tags/rel_20
84 LinkFail signal was not latching appropriate bit. mohor 8123d 18h /ethmac/tags/rel_20
83 MAC address recognition was not correct (bytes swaped). mohor 8123d 18h /ethmac/tags/rel_20
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8123d 19h /ethmac/tags/rel_20
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8123d 20h /ethmac/tags/rel_20
80 Small fixes for external/internal DMA missmatches. mohor 8127d 22h /ethmac/tags/rel_20
79 RetryCntLatched was unused and removed from design mohor 8127d 22h /ethmac/tags/rel_20
78 WB_SEL_I was unused and removed from design mohor 8127d 22h /ethmac/tags/rel_20
77 Interrupts changed mohor 8127d 22h /ethmac/tags/rel_20
76 Interrupts changed in the top file mohor 8127d 22h /ethmac/tags/rel_20
75 r_Bro is used for accepting/denying frames mohor 8127d 22h /ethmac/tags/rel_20
74 Reset values are passed to registers through parameters mohor 8127d 22h /ethmac/tags/rel_20
73 Number of interrupts changed mohor 8127d 22h /ethmac/tags/rel_20
72 Retry is not activated when a Tx Underrun occured mohor 8132d 02h /ethmac/tags/rel_20
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8136d 03h /ethmac/tags/rel_20
70 Small fixes. mohor 8136d 04h /ethmac/tags/rel_20

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