OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_20/] [bench/] - Rev 194

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
194 Full duplex tests modified and testbench bug repaired. tadej 8035d 05h /ethmac/tags/rel_20/bench/
192 Some additional reports added tadej 8037d 01h /ethmac/tags/rel_20/bench/
191 Bug repaired in eth_phy device tadej 8037d 01h /ethmac/tags/rel_20/bench/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).		 mohor 8037d 03h /ethmac/tags/rel_20/bench/
188 PHY changed. tadej 8037d 23h /ethmac/tags/rel_20/bench/
182 Full duplex test improved. tadej 8039d 01h /ethmac/tags/rel_20/bench/
181 MIIM test look better. mohor 8039d 04h /ethmac/tags/rel_20/bench/
180 Bench outputs data to display every 128 bytes. mohor 8042d 00h /ethmac/tags/rel_20/bench/
179 Beautiful tests merget together mohor 8042d 01h /ethmac/tags/rel_20/bench/
178 Rearanged testcases mohor 8042d 01h /ethmac/tags/rel_20/bench/
177 Bug in MIIM fixed. mohor 8042d 04h /ethmac/tags/rel_20/bench/
170 Headers changed. mohor 8042d 07h /ethmac/tags/rel_20/bench/
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 8042d 07h /ethmac/tags/rel_20/bench/
158 Typo fixed. mohor 8047d 03h /ethmac/tags/rel_20/bench/
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 8049d 08h /ethmac/tags/rel_20/bench/
156 Valid testbench. mohor 8049d 08h /ethmac/tags/rel_20/bench/
155 Minor changes. mohor 8049d 08h /ethmac/tags/rel_20/bench/
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 8092d 02h /ethmac/tags/rel_20/bench/
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 8094d 03h /ethmac/tags/rel_20/bench/
117 Clock mrx_clk set to 2.5 MHz. mohor 8098d 05h /ethmac/tags/rel_20/bench/
116 Testing environment also includes traffic cop, memory interface and host
interface.		 mohor 8098d 05h /ethmac/tags/rel_20/bench/
108 Testbench supports unaligned accesses. mohor 8175d 09h /ethmac/tags/rel_20/bench/
107 TX_BUF_BASE changed. mohor 8175d 09h /ethmac/tags/rel_20/bench/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8220d 06h /ethmac/tags/rel_20/bench/
80 Small fixes for external/internal DMA missmatches. mohor 8241d 02h /ethmac/tags/rel_20/bench/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8251d 06h /ethmac/tags/rel_20/bench/
66 Testbench fixed, code simplified, unused signals removed. mohor 8251d 12h /ethmac/tags/rel_20/bench/
51 Added separate tests for Multicast, Unicast, Broadcast billditt 8252d 23h /ethmac/tags/rel_20/bench/
49 HASH0 and HASH1 register read/write added. mohor 8254d 23h /ethmac/tags/rel_20/bench/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8261d 05h /ethmac/tags/rel_20/bench/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.