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203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.		 mohor 7892d 00h /ethmac/tags/rel_21/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.		 mohor 7895d 01h /ethmac/tags/rel_21/
201 Core size added to the document. mohor 7895d 02h /ethmac/tags/rel_21/
200 File with lower case checked in instead. mohor 7895d 02h /ethmac/tags/rel_21/
199 Datasheet name changed to lower case name. mohor 7895d 02h /ethmac/tags/rel_21/
198 Removed file. File with name in lower case will be added instead. mohor 7895d 02h /ethmac/tags/rel_21/
197 Ethernet Data Sheet. mohor 7895d 02h /ethmac/tags/rel_21/
196 Ethernet product brief. mohor 7895d 03h /ethmac/tags/rel_21/
195 Product brief removed because it is the same as Datasheet. mohor 7895d 03h /ethmac/tags/rel_21/
194 Full duplex tests modified and testbench bug repaired. tadej 7895d 04h /ethmac/tags/rel_21/
193 Temp version (backup). mohor 7895d 06h /ethmac/tags/rel_21/
192 Some additional reports added tadej 7897d 01h /ethmac/tags/rel_21/
191 Bug repaired in eth_phy device tadej 7897d 01h /ethmac/tags/rel_21/
190 Several information added to the file. mohor 7897d 02h /ethmac/tags/rel_21/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).		 mohor 7897d 02h /ethmac/tags/rel_21/
188 PHY changed. tadej 7897d 22h /ethmac/tags/rel_21/
187 _info file added. mohor 7897d 23h /ethmac/tags/rel_21/
186 Macro for testbench (DO file). mohor 7897d 23h /ethmac/tags/rel_21/
185 Directory keeper. mohor 7898d 00h /ethmac/tags/rel_21/
184 Modelsim simulation environment should be ready now. mohor 7898d 00h /ethmac/tags/rel_21/

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