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[/] [ethmac/] [tags/] [rel_21/] [rtl/] - Rev 269

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269 When in full duplex, transmit was sometimes blocked. Fixed. mohor 6494d 09h /ethmac/tags/rel_21/rtl/
264 Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
anywhere. Removed.
mohor 6553d 08h /ethmac/tags/rel_21/rtl/
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.
mohor 6553d 19h /ethmac/tags/rel_21/rtl/
259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).
mohor 6554d 21h /ethmac/tags/rel_21/rtl/
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 6554d 21h /ethmac/tags/rel_21/rtl/
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 6554d 21h /ethmac/tags/rel_21/rtl/
255 TPauseRq synchronized to tx_clk. mohor 6554d 21h /ethmac/tags/rel_21/rtl/
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 6556d 03h /ethmac/tags/rel_21/rtl/
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 6556d 04h /ethmac/tags/rel_21/rtl/
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 6556d 04h /ethmac/tags/rel_21/rtl/
248 wb_rst_i is used for MIIM reset. mohor 6557d 04h /ethmac/tags/rel_21/rtl/
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 6560d 07h /ethmac/tags/rel_21/rtl/
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 6561d 03h /ethmac/tags/rel_21/rtl/
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 6561d 23h /ethmac/tags/rel_21/rtl/
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 6561d 23h /ethmac/tags/rel_21/rtl/
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 6561d 23h /ethmac/tags/rel_21/rtl/
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 6561d 23h /ethmac/tags/rel_21/rtl/
238 Defines fixed to use generic RAM by default. mohor 6574d 03h /ethmac/tags/rel_21/rtl/
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 6576d 08h /ethmac/tags/rel_21/rtl/
232 fpga define added. mohor 6582d 02h /ethmac/tags/rel_21/rtl/

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