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[/] [ethmac/] [tags/] [rel_21] - Rev 259


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259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).
mohor 7763d 04h /ethmac/tags/rel_21
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.
mohor 7763d 04h /ethmac/tags/rel_21
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.
mohor 7763d 04h /ethmac/tags/rel_21
255 TPauseRq synchronized to tx_clk. mohor 7763d 04h /ethmac/tags/rel_21
254 Temp version. mohor 7764d 08h /ethmac/tags/rel_21
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7764d 10h /ethmac/tags/rel_21
252 Just some updates. tadejm 7764d 11h /ethmac/tags/rel_21
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.
mohor 7764d 11h /ethmac/tags/rel_21
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.
mohor 7764d 11h /ethmac/tags/rel_21
248 wb_rst_i is used for MIIM reset. mohor 7765d 11h /ethmac/tags/rel_21
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7768d 14h /ethmac/tags/rel_21
245 Rev 1.7. mohor 7769d 07h /ethmac/tags/rel_21
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7769d 10h /ethmac/tags/rel_21
243 Late collision is not reported any more. tadejm 7769d 15h /ethmac/tags/rel_21
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).
tadejm 7770d 06h /ethmac/tags/rel_21
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.
tadejm 7770d 06h /ethmac/tags/rel_21
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7770d 06h /ethmac/tags/rel_21
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7770d 06h /ethmac/tags/rel_21
238 Defines fixed to use generic RAM by default. mohor 7782d 10h /ethmac/tags/rel_21
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7784d 15h /ethmac/tags/rel_21

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