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[/] [ethmac/] [tags/] [rel_23/] - Rev 240

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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7864d 15h /ethmac/tags/rel_23
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7864d 15h /ethmac/tags/rel_23
238 Defines fixed to use generic RAM by default. mohor 7876d 19h /ethmac/tags/rel_23
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7879d 01h /ethmac/tags/rel_23
235 rev 4. mohor 7879d 15h /ethmac/tags/rel_23
234 Figure list assed to the revision 3. mohor 7880d 00h /ethmac/tags/rel_23
233 Revision 0.3 released. Some figures added. mohor 7880d 00h /ethmac/tags/rel_23
232 fpga define added. mohor 7884d 19h /ethmac/tags/rel_23
231 Description of Core Modules added (figure). mohor 7886d 20h /ethmac/tags/rel_23
229 case changed to casex. mohor 7890d 17h /ethmac/tags/rel_23
227 Changed BIST scan signals. tadejm 7890d 21h /ethmac/tags/rel_23
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7890d 22h /ethmac/tags/rel_23
225 Some minor changes. tadejm 7890d 22h /ethmac/tags/rel_23
224 Signals for a wave window in Modelsim. tadejm 7891d 00h /ethmac/tags/rel_23
223 Some code changed due to bug fixes. tadejm 7891d 00h /ethmac/tags/rel_23
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7894d 22h /ethmac/tags/rel_23
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
finished.		 mohor 7897d 22h /ethmac/tags/rel_23
218 Typo error fixed. (When using Bist) mohor 7898d 00h /ethmac/tags/rel_23
217 Bist supported. mohor 7898d 00h /ethmac/tags/rel_23
216 Bist signals added. mohor 7898d 00h /ethmac/tags/rel_23

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