URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_23/] - Rev 276

Rev	Log message	Author	Age	Path
252	Just some updates.	tadejm	7845d 03h	/ethmac/tags/rel_23
251	When control frame (PAUSE) was sent, status was written in the eth_wishbone module and both TXB and TXC interrupts were set. Fixed. Only TXC interrupt is set.	mohor	7845d 03h	/ethmac/tags/rel_23
250	AddressMiss status is connecting to the Rx BD. AddressMiss is identifying that a frame was received because of the promiscous mode.	mohor	7845d 03h	/ethmac/tags/rel_23
248	wb_rst_i is used for MIIM reset.	mohor	7846d 03h	/ethmac/tags/rel_23
246	Since r_Rst bit is not used any more, default value is changed to 0xa000.	mohor	7849d 06h	/ethmac/tags/rel_23
245	Rev 1.7.	mohor	7850d 00h	/ethmac/tags/rel_23
244	r_Rst signal does not reset any module any more and is removed from the design.	mohor	7850d 02h	/ethmac/tags/rel_23
243	Late collision is not reported any more.	tadejm	7850d 08h	/ethmac/tags/rel_23
242	Late collision is reported only when not in the full duplex. Sample is taken (for status) as soon as MRxDV is not valid (regardless of the received byte cnt).	tadejm	7850d 22h	/ethmac/tags/rel_23
241	StartIdle state changed (not important the size of the packet). StartData1 activates only while ByteCnt is smaller than the MaxFrame.	tadejm	7850d 22h	/ethmac/tags/rel_23