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[/] [ethmac/] [tags/] [rel_24/] - Rev 203

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Rev Log message Author Age Path
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.
mohor 8115d 16h /ethmac/tags/rel_24/
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.
mohor 8118d 17h /ethmac/tags/rel_24/
201 Core size added to the document. mohor 8118d 18h /ethmac/tags/rel_24/
200 File with lower case checked in instead. mohor 8118d 18h /ethmac/tags/rel_24/
199 Datasheet name changed to lower case name. mohor 8118d 18h /ethmac/tags/rel_24/
198 Removed file. File with name in lower case will be added instead. mohor 8118d 18h /ethmac/tags/rel_24/
197 Ethernet Data Sheet. mohor 8118d 18h /ethmac/tags/rel_24/
196 Ethernet product brief. mohor 8118d 19h /ethmac/tags/rel_24/
195 Product brief removed because it is the same as Datasheet. mohor 8118d 19h /ethmac/tags/rel_24/
194 Full duplex tests modified and testbench bug repaired. tadej 8118d 20h /ethmac/tags/rel_24/
193 Temp version (backup). mohor 8118d 21h /ethmac/tags/rel_24/
192 Some additional reports added tadej 8120d 16h /ethmac/tags/rel_24/
191 Bug repaired in eth_phy device tadej 8120d 16h /ethmac/tags/rel_24/
190 Several information added to the file. mohor 8120d 17h /ethmac/tags/rel_24/
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 8120d 17h /ethmac/tags/rel_24/
188 PHY changed. tadej 8121d 14h /ethmac/tags/rel_24/
187 _info file added. mohor 8121d 14h /ethmac/tags/rel_24/
186 Macro for testbench (DO file). mohor 8121d 15h /ethmac/tags/rel_24/
185 Directory keeper. mohor 8121d 15h /ethmac/tags/rel_24/
184 Modelsim simulation environment should be ready now. mohor 8121d 15h /ethmac/tags/rel_24/

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