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[/] [ethmac/] [tags/] [rel_24/] - Rev 240


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Rev Log message Author Age Path
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7685d 13h /ethmac/tags/rel_24
239 RxError is not generated when small frame reception is enabled and small
frames are received.
tadejm 7685d 13h /ethmac/tags/rel_24
238 Defines fixed to use generic RAM by default. mohor 7697d 17h /ethmac/tags/rel_24
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7699d 22h /ethmac/tags/rel_24
235 rev 4. mohor 7700d 13h /ethmac/tags/rel_24
234 Figure list assed to the revision 3. mohor 7700d 21h /ethmac/tags/rel_24
233 Revision 0.3 released. Some figures added. mohor 7700d 21h /ethmac/tags/rel_24
232 fpga define added. mohor 7705d 16h /ethmac/tags/rel_24
231 Description of Core Modules added (figure). mohor 7707d 18h /ethmac/tags/rel_24
229 case changed to casex. mohor 7711d 14h /ethmac/tags/rel_24
227 Changed BIST scan signals. tadejm 7711d 18h /ethmac/tags/rel_24
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7711d 19h /ethmac/tags/rel_24
225 Some minor changes. tadejm 7711d 20h /ethmac/tags/rel_24
224 Signals for a wave window in Modelsim. tadejm 7711d 21h /ethmac/tags/rel_24
223 Some code changed due to bug fixes. tadejm 7711d 21h /ethmac/tags/rel_24
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.
mohor 7715d 19h /ethmac/tags/rel_24
219 txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file,
TxDone and TxRetry are generated after the current WISHBONE access is
mohor 7718d 20h /ethmac/tags/rel_24
218 Typo error fixed. (When using Bist) mohor 7718d 22h /ethmac/tags/rel_24
217 Bist supported. mohor 7718d 22h /ethmac/tags/rel_24
216 Bist signals added. mohor 7718d 22h /ethmac/tags/rel_24

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