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Rev Log message Author Age Path
120 Unused files removed. mohor 8172d 19h /ethmac/tags/rel_25/
119 Ram , used for BDs changed from generic_spram to eth_spram_256x32. mohor 8172d 19h /ethmac/tags/rel_25/
118 ShiftEnded synchronization changed. mohor 8176d 09h /ethmac/tags/rel_25/
117 Clock mrx_clk set to 2.5 MHz. mohor 8176d 20h /ethmac/tags/rel_25/
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 8176d 20h /ethmac/tags/rel_25/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 8177d 18h /ethmac/tags/rel_25/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 8178d 15h /ethmac/tags/rel_25/
113 RxPointer bug fixed. mohor 8185d 07h /ethmac/tags/rel_25/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 8185d 21h /ethmac/tags/rel_25/
111 Master state machine had a bug when switching from master write to
master read.
mohor 8186d 10h /ethmac/tags/rel_25/
110 m_wb_cyc_o signal released after every single transfer. mohor 8186d 13h /ethmac/tags/rel_25/
109 Comment removed. mohor 8186d 14h /ethmac/tags/rel_25/
108 Testbench supports unaligned accesses. mohor 8254d 00h /ethmac/tags/rel_25/
107 TX_BUF_BASE changed. mohor 8254d 00h /ethmac/tags/rel_25/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8254d 00h /ethmac/tags/rel_25/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 8263d 01h /ethmac/tags/rel_25/
104 FCS should not be included in NibbleMinFl. mohor 8264d 19h /ethmac/tags/rel_25/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 8264d 20h /ethmac/tags/rel_25/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 8264d 20h /ethmac/tags/rel_25/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8264d 20h /ethmac/tags/rel_25/

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