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Rev Log message Author Age Path
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7835d 07h /ethmac/tags/rel_25
255 TPauseRq synchronized to tx_clk. mohor 7835d 08h /ethmac/tags/rel_25
254 Temp version. mohor 7836d 11h /ethmac/tags/rel_25
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7836d 13h /ethmac/tags/rel_25
252 Just some updates. tadejm 7836d 14h /ethmac/tags/rel_25
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7836d 14h /ethmac/tags/rel_25
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7836d 14h /ethmac/tags/rel_25
248 wb_rst_i is used for MIIM reset. mohor 7837d 14h /ethmac/tags/rel_25
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7840d 17h /ethmac/tags/rel_25
245 Rev 1.7. mohor 7841d 11h /ethmac/tags/rel_25
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7841d 13h /ethmac/tags/rel_25
243 Late collision is not reported any more. tadejm 7841d 18h /ethmac/tags/rel_25
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7842d 09h /ethmac/tags/rel_25
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7842d 09h /ethmac/tags/rel_25
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7842d 09h /ethmac/tags/rel_25
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7842d 09h /ethmac/tags/rel_25
238 Defines fixed to use generic RAM by default. mohor 7854d 13h /ethmac/tags/rel_25
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7856d 19h /ethmac/tags/rel_25
235 rev 4. mohor 7857d 09h /ethmac/tags/rel_25
234 Figure list assed to the revision 3. mohor 7857d 18h /ethmac/tags/rel_25

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