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[/] [ethmac/] [tags/] [rel_25/] - Rev 312

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Rev Log message Author Age Path
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 7455d 16h /ethmac/tags/rel_25
311 Update script for running different file list files for different RAM models. tadejm 7455d 16h /ethmac/tags/rel_25
310 More signals. tadejm 7455d 16h /ethmac/tags/rel_25
309 Update file list files for different RAM models with byte select accessing. tadejm 7455d 16h /ethmac/tags/rel_25
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 7455d 16h /ethmac/tags/rel_25
306 Lapsus fixed (!we -> ~we). simons 7456d 14h /ethmac/tags/rel_25
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 7478d 11h /ethmac/tags/rel_25
302 mbist signals updated according to newest convention markom 7504d 21h /ethmac/tags/rel_25
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 7515d 13h /ethmac/tags/rel_25
299 Artisan RAMs added. mohor 7562d 17h /ethmac/tags/rel_25
297 Artisan ram instance added. simons 7568d 12h /ethmac/tags/rel_25
295 Few minor changes. tadejm 7569d 15h /ethmac/tags/rel_25
294 Added path to a file with distributed RAM instances for xilinx. tadejm 7571d 16h /ethmac/tags/rel_25
293 initial. tadejm 7595d 13h /ethmac/tags/rel_25
292 Corrected mistake. tadejm 7595d 13h /ethmac/tags/rel_25
291 initial tadejm 7595d 14h /ethmac/tags/rel_25
290 Additional checking for FAILED tests added - for ATS. tadejm 7595d 15h /ethmac/tags/rel_25
288 This file was not part of the RTL before, but it should be here. simons 7604d 14h /ethmac/tags/rel_25
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.		 mohor 7630d 17h /ethmac/tags/rel_25
285 Binary operator used instead of unary (xnor). mohor 7630d 18h /ethmac/tags/rel_25

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