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[/] [ethmac/] [tags/] [rel_25/] - Rev 315

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Rev Log message Author Age Path
315 Updated testbench. Some more testcases, some repaired. tadejm 5852d 23h /ethmac/tags/rel_25/
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 5852d 23h /ethmac/tags/rel_25/
311 Update script for running different file list files for different RAM models. tadejm 5852d 23h /ethmac/tags/rel_25/
310 More signals. tadejm 5852d 23h /ethmac/tags/rel_25/
309 Update file list files for different RAM models with byte select accessing. tadejm 5852d 23h /ethmac/tags/rel_25/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 5852d 23h /ethmac/tags/rel_25/
306 Lapsus fixed (!we -> ~we). simons 5853d 21h /ethmac/tags/rel_25/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 5875d 18h /ethmac/tags/rel_25/
302 mbist signals updated according to newest convention markom 5902d 04h /ethmac/tags/rel_25/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 5912d 20h /ethmac/tags/rel_25/
299 Artisan RAMs added. mohor 5960d 00h /ethmac/tags/rel_25/
297 Artisan ram instance added. simons 5965d 19h /ethmac/tags/rel_25/
295 Few minor changes. tadejm 5966d 22h /ethmac/tags/rel_25/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 5968d 23h /ethmac/tags/rel_25/
293 initial. tadejm 5992d 20h /ethmac/tags/rel_25/
292 Corrected mistake. tadejm 5992d 20h /ethmac/tags/rel_25/
291 initial tadejm 5992d 21h /ethmac/tags/rel_25/
290 Additional checking for FAILED tests added - for ATS. tadejm 5992d 22h /ethmac/tags/rel_25/
288 This file was not part of the RTL before, but it should be here. simons 6001d 21h /ethmac/tags/rel_25/
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 6028d 00h /ethmac/tags/rel_25/

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