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[/] [ethmac/] [tags/] [rel_26/] - Rev 218

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Rev Log message Author Age Path
218 Typo error fixed. (When using Bist) mohor 7903d 00h /ethmac/tags/rel_26
217 Bist supported. mohor 7903d 00h /ethmac/tags/rel_26
216 Bist signals added. mohor 7903d 00h /ethmac/tags/rel_26
215 Bist supported. mohor 7903d 01h /ethmac/tags/rel_26
214 Signals for WISHBONE B3 compliant interface added. mohor 7903d 21h /ethmac/tags/rel_26
213 Defines changed to have ETH_ prolog.
ETH_WISHBONE_B# define added.		 mohor 7903d 21h /ethmac/tags/rel_26
212 Minor $display change. mohor 7903d 21h /ethmac/tags/rel_26
211 Bist added. mohor 7903d 21h /ethmac/tags/rel_26
210 BIST added. mohor 7903d 21h /ethmac/tags/rel_26
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.		 tadejm 7905d 01h /ethmac/tags/rel_26
208 Virtual Silicon RAMs moved to lib directory tadej 7920d 18h /ethmac/tags/rel_26
207 Virtual Silicon RAM support fixed tadej 7920d 19h /ethmac/tags/rel_26
206 Virtual Silicon RAM added to the simulation. mohor 7920d 19h /ethmac/tags/rel_26
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7920d 19h /ethmac/tags/rel_26
204 ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation). mohor 7920d 19h /ethmac/tags/rel_26
203 Virtual Silicon RAM might be used in the ASIC implementation of the ethernet
core.		 mohor 7920d 19h /ethmac/tags/rel_26
202 CsMiss added. When address between 0x800 and 0xfff is accessed within
Ethernet Core, error acknowledge is generated.		 mohor 7923d 21h /ethmac/tags/rel_26
201 Core size added to the document. mohor 7923d 21h /ethmac/tags/rel_26
200 File with lower case checked in instead. mohor 7923d 21h /ethmac/tags/rel_26
199 Datasheet name changed to lower case name. mohor 7923d 22h /ethmac/tags/rel_26

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