URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_26/] [rtl] - Rev 257

Rev	Log message	Author	Age	Path
219	txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file, TxDone and TxRetry are generated after the current WISHBONE access is finished.	mohor	7873d 10h	/ethmac/tags/rel_26/rtl
218	Typo error fixed. (When using Bist)	mohor	7873d 12h	/ethmac/tags/rel_26/rtl
214	Signals for WISHBONE B3 compliant interface added.	mohor	7874d 09h	/ethmac/tags/rel_26/rtl
213	Defines changed to have ETH_ prolog. ETH_WISHBONE_B# define added.	mohor	7874d 09h	/ethmac/tags/rel_26/rtl
212	Minor $display change.	mohor	7874d 09h	/ethmac/tags/rel_26/rtl
211	Bist added.	mohor	7874d 09h	/ethmac/tags/rel_26/rtl
210	BIST added.	mohor	7874d 09h	/ethmac/tags/rel_26/rtl
204	ETH_VIRTUAL_SILICON_RAM supported (for ASIC implementation).	mohor	7891d 07h	/ethmac/tags/rel_26/rtl
203	Virtual Silicon RAM might be used in the ASIC implementation of the ethernet core.	mohor	7891d 07h	/ethmac/tags/rel_26/rtl
202	CsMiss added. When address between 0x800 and 0xfff is accessed within Ethernet Core, error acknowledge is generated.	mohor	7894d 08h	/ethmac/tags/rel_26/rtl