URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_26/] [rtl] - Rev 277

Rev	Log message	Author	Age	Path
240	All modules are reset with wb_rst instead of the r_Rst. Exception is MII module.	tadejm	7841d 04h	/ethmac/tags/rel_26/rtl
239	RxError is not generated when small frame reception is enabled and small frames are received.	tadejm	7841d 04h	/ethmac/tags/rel_26/rtl
238	Defines fixed to use generic RAM by default.	mohor	7853d 08h	/ethmac/tags/rel_26/rtl
236	State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery.	mohor	7855d 13h	/ethmac/tags/rel_26/rtl
232	fpga define added.	mohor	7861d 07h	/ethmac/tags/rel_26/rtl
229	case changed to casex.	mohor	7867d 05h	/ethmac/tags/rel_26/rtl
227	Changed BIST scan signals.	tadejm	7867d 09h	/ethmac/tags/rel_26/rtl
226	Igor added WB burst support and repaired BUG when handling TX under-run and retry.	tadejm	7867d 10h	/ethmac/tags/rel_26/rtl
221	TxStatus is written after last access to the TX fifo is finished (in case of abort or retry). TxDone is fixed.	mohor	7871d 10h	/ethmac/tags/rel_26/rtl
219	txfifo_cnt and rxfifo_cnt counters width is defined in the eth_define.v file, TxDone and TxRetry are generated after the current WISHBONE access is finished.	mohor	7874d 11h	/ethmac/tags/rel_26/rtl