OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_26/] [rtl] - Rev 278

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
278 A new bug (entered with previous update) fixed. When abort occured sometimes
data transmission was blocked.		 mohor 7768d 06h /ethmac/tags/rel_26/rtl
277 When padding was enabled and crc disabled, frame was not ended correctly. mohor 7768d 06h /ethmac/tags/rel_26/rtl
276 Defer indication changed. tadejm 7768d 07h /ethmac/tags/rel_26/rtl
275 Fix MTxErr or prevent sending too big frames. mohor 7775d 11h /ethmac/tags/rel_26/rtl
272 When control packets were received, they were ignored in some cases. tadejm 7776d 06h /ethmac/tags/rel_26/rtl
270 When receiving normal data frame and RxFlow control was switched on, RXB
interrupt was not set.		 mohor 7777d 08h /ethmac/tags/rel_26/rtl
269 When in full duplex, transmit was sometimes blocked. Fixed. mohor 7778d 08h /ethmac/tags/rel_26/rtl
264 Registers RxStatusWrite_rck and RxStatusWriteLatched were not used
anywhere. Removed.		 mohor 7837d 07h /ethmac/tags/rel_26/rtl
261 Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
synchronized.		 mohor 7837d 18h /ethmac/tags/rel_26/rtl
259 In loopback rx_clk is not looped back. Possible CRC error. Consider if usage
of additional logic is necessery (FIFO for looping the data).		 mohor 7838d 19h /ethmac/tags/rel_26/rtl
257 When TxUsedData and CtrlMux occur at the same time, byte counter needs
to be incremented by 2. Signal IncrementByteCntBy2 added for that reason.		 mohor 7838d 20h /ethmac/tags/rel_26/rtl
256 TxDone and TxAbort changed so they're not propagated to the wishbone
module when control frame is transmitted.		 mohor 7838d 20h /ethmac/tags/rel_26/rtl
255 TPauseRq synchronized to tx_clk. mohor 7838d 20h /ethmac/tags/rel_26/rtl
253 r_MiiMRst is not used for resetting the MIIM module. wb_rst used instead. mohor 7840d 02h /ethmac/tags/rel_26/rtl
251 When control frame (PAUSE) was sent, status was written in the
eth_wishbone module and both TXB and TXC interrupts were set. Fixed.
Only TXC interrupt is set.		 mohor 7840d 02h /ethmac/tags/rel_26/rtl
250 AddressMiss status is connecting to the Rx BD. AddressMiss is identifying
that a frame was received because of the promiscous mode.		 mohor 7840d 02h /ethmac/tags/rel_26/rtl
248 wb_rst_i is used for MIIM reset. mohor 7841d 03h /ethmac/tags/rel_26/rtl
246 Since r_Rst bit is not used any more, default value is changed to 0xa000. mohor 7844d 06h /ethmac/tags/rel_26/rtl
244 r_Rst signal does not reset any module any more and is removed from the design. mohor 7845d 01h /ethmac/tags/rel_26/rtl
242 Late collision is reported only when not in the full duplex.
Sample is taken (for status) as soon as MRxDV is not valid (regardless
of the received byte cnt).		 tadejm 7845d 22h /ethmac/tags/rel_26/rtl
241 StartIdle state changed (not important the size of the packet).
StartData1 activates only while ByteCnt is smaller than the MaxFrame.		 tadejm 7845d 22h /ethmac/tags/rel_26/rtl
240 All modules are reset with wb_rst instead of the r_Rst. Exception is MII module. tadejm 7845d 22h /ethmac/tags/rel_26/rtl
239 RxError is not generated when small frame reception is enabled and small
frames are received.		 tadejm 7845d 22h /ethmac/tags/rel_26/rtl
238 Defines fixed to use generic RAM by default. mohor 7858d 02h /ethmac/tags/rel_26/rtl
236 State machine goes from idle to the defer state when CarrierSense is 1. FCS (CRC appending) fixed to check the CrcEn bit also when padding is necessery. mohor 7860d 07h /ethmac/tags/rel_26/rtl
232 fpga define added. mohor 7866d 01h /ethmac/tags/rel_26/rtl
229 case changed to casex. mohor 7871d 23h /ethmac/tags/rel_26/rtl
227 Changed BIST scan signals. tadejm 7872d 03h /ethmac/tags/rel_26/rtl
226 Igor added WB burst support and repaired BUG when handling TX under-run and retry. tadejm 7872d 04h /ethmac/tags/rel_26/rtl
221 TxStatus is written after last access to the TX fifo is finished (in case of abort
or retry). TxDone is fixed.		 mohor 7876d 04h /ethmac/tags/rel_26/rtl

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.