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[/] [ethmac/] [tags/] [rel_26/] [sim/] - Rev 311

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Rev Log message Author Age Path
311 Update script for running different file list files for different RAM models. tadejm 6832d 07h /ethmac/tags/rel_26/sim/
310 More signals. tadejm 6832d 07h /ethmac/tags/rel_26/sim/
309 Update file list files for different RAM models with byte select accessing. tadejm 6832d 07h /ethmac/tags/rel_26/sim/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 6832d 07h /ethmac/tags/rel_26/sim/
299 Artisan RAMs added. mohor 6939d 08h /ethmac/tags/rel_26/sim/
295 Few minor changes. tadejm 6946d 06h /ethmac/tags/rel_26/sim/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 6948d 07h /ethmac/tags/rel_26/sim/
293 initial. tadejm 6972d 04h /ethmac/tags/rel_26/sim/
292 Corrected mistake. tadejm 6972d 04h /ethmac/tags/rel_26/sim/
291 initial tadejm 6972d 05h /ethmac/tags/rel_26/sim/
290 Additional checking for FAILED tests added - for ATS. tadejm 6972d 06h /ethmac/tags/rel_26/sim/
225 Some minor changes. tadejm 7245d 04h /ethmac/tags/rel_26/sim/
224 Signals for a wave window in Modelsim. tadejm 7245d 06h /ethmac/tags/rel_26/sim/
217 Bist supported. mohor 7252d 06h /ethmac/tags/rel_26/sim/
215 Bist supported. mohor 7252d 07h /ethmac/tags/rel_26/sim/
208 Virtual Silicon RAMs moved to lib directory tadej 7270d 00h /ethmac/tags/rel_26/sim/
207 Virtual Silicon RAM support fixed tadej 7270d 01h /ethmac/tags/rel_26/sim/
206 Virtual Silicon RAM added to the simulation. mohor 7270d 01h /ethmac/tags/rel_26/sim/
205 ETH_VIRTUAL_SILICON_RAM supported. mohor 7270d 01h /ethmac/tags/rel_26/sim/
187 _info file added. mohor 7276d 00h /ethmac/tags/rel_26/sim/

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