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108 Testbench supports unaligned accesses. mohor 8038d 01h /ethmac/tags/rel_27
107 TX_BUF_BASE changed. mohor 8038d 01h /ethmac/tags/rel_27
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8038d 01h /ethmac/tags/rel_27
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.		 mohor 8047d 03h /ethmac/tags/rel_27
104 FCS should not be included in NibbleMinFl. mohor 8048d 21h /ethmac/tags/rel_27
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v		 mohor 8048d 21h /ethmac/tags/rel_27
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.		 mohor 8048d 22h /ethmac/tags/rel_27
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8048d 22h /ethmac/tags/rel_27
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).		 mohor 8048d 22h /ethmac/tags/rel_27
99 Document revised. mohor 8055d 21h /ethmac/tags/rel_27
98 Document revised. mohor 8055d 21h /ethmac/tags/rel_27
97 Small typo fixed. lampret 8072d 19h /ethmac/tags/rel_27
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.		 mohor 8076d 19h /ethmac/tags/rel_27
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.		 mohor 8076d 22h /ethmac/tags/rel_27
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.		 mohor 8076d 22h /ethmac/tags/rel_27
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8081d 20h /ethmac/tags/rel_27
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.		 mohor 8082d 23h /ethmac/tags/rel_27
91 Comments in Slovene language removed. mohor 8082d 23h /ethmac/tags/rel_27
90 casex changed with case, fifo reset changed. mohor 8082d 23h /ethmac/tags/rel_27
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.		 mohor 8086d 21h /ethmac/tags/rel_27

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