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Rev Log message Author Age Path
318 Latest Ethernet IP core testbench. tadejm 6510d 18h /ethmac/tags/rel_27/
317 Multicast detection fixed. Only the LSB of the first byte is checked. igorm 6520d 01h /ethmac/tags/rel_27/
315 Updated testbench. Some more testcases, some repaired. tadejm 6622d 21h /ethmac/tags/rel_27/
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 6622d 21h /ethmac/tags/rel_27/
311 Update script for running different file list files for different RAM models. tadejm 6622d 22h /ethmac/tags/rel_27/
310 More signals. tadejm 6622d 22h /ethmac/tags/rel_27/
309 Update file list files for different RAM models with byte select accessing. tadejm 6622d 22h /ethmac/tags/rel_27/
308 Moved RAM model file path from sim_file_list.lst to this file. tadejm 6622d 22h /ethmac/tags/rel_27/
306 Lapsus fixed (!we -> ~we). simons 6623d 19h /ethmac/tags/rel_27/
304 WISHBONE slave changed and tested from only 32-bit accesss to byte access. tadejm 6645d 16h /ethmac/tags/rel_27/
302 mbist signals updated according to newest convention markom 6672d 02h /ethmac/tags/rel_27/
301 Update RxEnSync only when mrxdv_pad_i is inactive (LOW). knguyen 6682d 18h /ethmac/tags/rel_27/
299 Artisan RAMs added. mohor 6729d 22h /ethmac/tags/rel_27/
297 Artisan ram instance added. simons 6735d 17h /ethmac/tags/rel_27/
295 Few minor changes. tadejm 6736d 21h /ethmac/tags/rel_27/
294 Added path to a file with distributed RAM instances for xilinx. tadejm 6738d 21h /ethmac/tags/rel_27/
293 initial. tadejm 6762d 18h /ethmac/tags/rel_27/
292 Corrected mistake. tadejm 6762d 18h /ethmac/tags/rel_27/
291 initial tadejm 6762d 19h /ethmac/tags/rel_27/
290 Additional checking for FAILED tests added - for ATS. tadejm 6762d 20h /ethmac/tags/rel_27/

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