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[/] [ethmac/] [tags/] [rel_27/] [bench/] - Rev 158

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Rev Log message Author Age Path
158 Typo fixed. mohor 7912d 12h /ethmac/tags/rel_27/bench
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7914d 18h /ethmac/tags/rel_27/bench
156 Valid testbench. mohor 7914d 18h /ethmac/tags/rel_27/bench
155 Minor changes. mohor 7914d 18h /ethmac/tags/rel_27/bench
124 Define ETH_MIIMODER_RST corrected to 0x00000400. mohor 7957d 11h /ethmac/tags/rel_27/bench
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 7959d 12h /ethmac/tags/rel_27/bench
117 Clock mrx_clk set to 2.5 MHz. mohor 7963d 15h /ethmac/tags/rel_27/bench
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 7963d 15h /ethmac/tags/rel_27/bench
108 Testbench supports unaligned accesses. mohor 8040d 18h /ethmac/tags/rel_27/bench
107 TX_BUF_BASE changed. mohor 8040d 18h /ethmac/tags/rel_27/bench
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8085d 16h /ethmac/tags/rel_27/bench
80 Small fixes for external/internal DMA missmatches. mohor 8106d 12h /ethmac/tags/rel_27/bench
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8116d 16h /ethmac/tags/rel_27/bench
66 Testbench fixed, code simplified, unused signals removed. mohor 8116d 21h /ethmac/tags/rel_27/bench
51 Added separate tests for Multicast, Unicast, Broadcast billditt 8118d 08h /ethmac/tags/rel_27/bench
49 HASH0 and HASH1 register read/write added. mohor 8120d 08h /ethmac/tags/rel_27/bench
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8126d 14h /ethmac/tags/rel_27/bench
36 TX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8186d 16h /ethmac/tags/rel_27/bench
23 Number of addresses (wb_adr_i) minimized. mohor 8236d 17h /ethmac/tags/rel_27/bench
22 eth_timescale.v changed to timescale.v This is done because of the
simulation of the few cores in a one joined project.
mohor 8236d 20h /ethmac/tags/rel_27/bench

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