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[/] [ethmac/] [tags/] [rel_3] - Rev 88

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Rev Log message Author Age Path
88 rx_fifo was not always cleared ok. Fixed. mohor 8103d 04h /ethmac/tags/rel_3
87 Status was not latched correctly sometimes. Fixed. mohor 8103d 06h /ethmac/tags/rel_3
86 Big Endian problem when sending frames fixed. mohor 8104d 13h /ethmac/tags/rel_3
85 Log info was missing. mohor 8109d 23h /ethmac/tags/rel_3
84 LinkFail signal was not latching appropriate bit. mohor 8109d 23h /ethmac/tags/rel_3
83 MAC address recognition was not correct (bytes swaped). mohor 8109d 23h /ethmac/tags/rel_3
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.		 mohor 8110d 01h /ethmac/tags/rel_3
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8110d 01h /ethmac/tags/rel_3
80 Small fixes for external/internal DMA missmatches. mohor 8114d 03h /ethmac/tags/rel_3
79 RetryCntLatched was unused and removed from design mohor 8114d 03h /ethmac/tags/rel_3
78 WB_SEL_I was unused and removed from design mohor 8114d 03h /ethmac/tags/rel_3
77 Interrupts changed mohor 8114d 03h /ethmac/tags/rel_3
76 Interrupts changed in the top file mohor 8114d 03h /ethmac/tags/rel_3
75 r_Bro is used for accepting/denying frames mohor 8114d 04h /ethmac/tags/rel_3
74 Reset values are passed to registers through parameters mohor 8114d 04h /ethmac/tags/rel_3
73 Number of interrupts changed mohor 8114d 04h /ethmac/tags/rel_3
72 Retry is not activated when a Tx Underrun occured mohor 8118d 07h /ethmac/tags/rel_3
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.		 mohor 8122d 08h /ethmac/tags/rel_3
70 Small fixes. mohor 8122d 09h /ethmac/tags/rel_3
69 Define missmatch fixed. mohor 8123d 06h /ethmac/tags/rel_3

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