URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_4/] [rtl/] [verilog/] [eth_wishbone.v] - Rev 338

Rev	Log message	Author	Age	Path
87	Status was not latched correctly sometimes. Fixed.	mohor	8089d 11h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
86	Big Endian problem when sending frames fixed.	mohor	8090d 18h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
82	Byte ordering changed (Big Endian used). casex changed with case because Xilinx Foundation had problems. Tested in HW. It WORKS.	mohor	8096d 06h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
80	Small fixes for external/internal DMA missmatches.	mohor	8100d 08h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
77	Interrupts changed	mohor	8100d 09h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
64	Status was not written correctly when frames were discarted because of address mismatch.	mohor	8111d 08h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
61	RxStartFrm cleared when abort or retry comes.	mohor	8111d 13h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
60	Changes that were lost when updating from 1.5 to 1.8 fixed.	mohor	8111d 13h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
54	Addition of new module eth_addrcheck.v	billditt	8112d 04h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v
48	RxOverRun added to statuses.	mohor	8114d 08h	/ethmac/tags/rel_4/rtl/verilog/eth_wishbone.v