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166 Reception is possible after RxPointer is read and not after BD is read. For
that reason RxBDReady is changed to RxReady.
Busy_IRQ interrupt connected. When there is no RxBD ready and frame
comes, interrupt is generated.
mohor 7899d 02h /ethmac/tags/rel_5/
165 HASH improvement needed. mohor 7899d 05h /ethmac/tags/rel_5/
164 Ethernet debug registers removed. mohor 7899d 05h /ethmac/tags/rel_5/
163 Another temporary version. Core is almost finished. Testbench not included,
yet"
mohor 7899d 21h /ethmac/tags/rel_5/
162 Another temporary version. Core is almost finished. Testbench not included,
yet.
mohor 7899d 21h /ethmac/tags/rel_5/
161 Error acknowledge is generated when accessing BDs and RST bit in the
MODER register (r_Rst) is set.
mohor 7900d 03h /ethmac/tags/rel_5/
160 error acknowledge cycle termination added to display. mohor 7900d 03h /ethmac/tags/rel_5/
159 Async reset for WB_ACK_O removed (when core was in reset, it was
impossible to access BDs).
RxPointers and TxPointers names changed to be more descriptive.
TxUnderRun synchronized.
mohor 7900d 23h /ethmac/tags/rel_5/
158 Typo fixed. mohor 7900d 23h /ethmac/tags/rel_5/
157 This testbench will soon be obsolete. Please use tb_ethernet.v mohor 7903d 05h /ethmac/tags/rel_5/

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