OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_6/] - Rev 117

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
117 Clock mrx_clk set to 2.5 MHz. mohor 7973d 09h /ethmac/tags/rel_6/
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 7973d 09h /ethmac/tags/rel_6/
115 RxBDAddress takes `ETH_TX_BD_NUM_DEF value after reset. mohor 7974d 07h /ethmac/tags/rel_6/
114 EXTERNAL_DMA removed. External DMA not supported. mohor 7975d 05h /ethmac/tags/rel_6/
113 RxPointer bug fixed. mohor 7981d 21h /ethmac/tags/rel_6/
112 Previous bug wasn't succesfully removed. Now fixed. mohor 7982d 10h /ethmac/tags/rel_6/
111 Master state machine had a bug when switching from master write to
master read.
mohor 7983d 00h /ethmac/tags/rel_6/
110 m_wb_cyc_o signal released after every single transfer. mohor 7983d 03h /ethmac/tags/rel_6/
109 Comment removed. mohor 7983d 03h /ethmac/tags/rel_6/
108 Testbench supports unaligned accesses. mohor 8050d 13h /ethmac/tags/rel_6/
107 TX_BUF_BASE changed. mohor 8050d 13h /ethmac/tags/rel_6/
106 Outputs registered. Reset changed for eth_wishbone module. mohor 8050d 13h /ethmac/tags/rel_6/
105 Compiler directives added. Tx and Rx fifo size incremented. A "late collision"
bug fixed.
mohor 8059d 15h /ethmac/tags/rel_6/
104 FCS should not be included in NibbleMinFl. mohor 8061d 09h /ethmac/tags/rel_6/
103 Wishbone signals are registered when ETH_REGISTERED_OUTPUTS is
selected in eth_defines.v
mohor 8061d 09h /ethmac/tags/rel_6/
102 Interrupts are visible in the ETH_INT_SOURCE regardless if they are enabled
or not.
mohor 8061d 09h /ethmac/tags/rel_6/
101 Short frame and ReceivedLengthOK were not detected correctly. mohor 8061d 10h /ethmac/tags/rel_6/
100 Generic ram or Xilinx ram can be used in fifo (selectable by setting
ETH_FIFO_XILINX in eth_defines.v).
mohor 8061d 10h /ethmac/tags/rel_6/
99 Document revised. mohor 8068d 08h /ethmac/tags/rel_6/
98 Document revised. mohor 8068d 09h /ethmac/tags/rel_6/
97 Small typo fixed. lampret 8085d 07h /ethmac/tags/rel_6/
96 Any address can be used for Tx and Rx BD pointers. Address does not need
to be aligned.
mohor 8089d 07h /ethmac/tags/rel_6/
95 md_padoen_o changed to md_padoe_o. Signal was always active high, just
name was incorrect.
mohor 8089d 10h /ethmac/tags/rel_6/
94 When clear and read/write are active at the same time, cnt and pointers are
set to 1.
mohor 8089d 10h /ethmac/tags/rel_6/
93 When in promiscous mode some frames were not received correctly. Fixed. mohor 8094d 08h /ethmac/tags/rel_6/
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8095d 11h /ethmac/tags/rel_6/
91 Comments in Slovene language removed. mohor 8095d 11h /ethmac/tags/rel_6/
90 casex changed with case, fifo reset changed. mohor 8095d 11h /ethmac/tags/rel_6/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
changed.
mohor 8099d 08h /ethmac/tags/rel_6/
88 rx_fifo was not always cleared ok. Fixed. mohor 8105d 07h /ethmac/tags/rel_6/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.