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[/] [ethmac/] [tags/] [rel_7/] [rtl/] [verilog/] [eth_top.v] - Rev 338

Rev	Log message	Author	Age	Path
68	Registered trimmed. Unused registers removed.	mohor	8105d 05h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
67	EXTERNAL_DMA used instead of WISHBONE_DMA.	mohor	8105d 06h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
65	Testbench fixed, code simplified, unused signals removed.	mohor	8105d 12h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
63	RxAbort is connected differently.	mohor	8106d 05h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
59	Changes that were lost when updating from 1.11 to 1.14 fixed.	mohor	8106d 08h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
52	Modified for Address Checking, addition of eth_addrcheck.v	billditt	8106d 23h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
47	HASH0 and HASH1 registers added. Registers address width was changed to 8 bits.	mohor	8109d 02h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
43	Tx status is written back to the BD.	mohor	8110d 10h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
42	Rx status is written back to the BD.	mohor	8113d 03h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v
41	non-DMA host interface added. Select the right configutation in eth_defines.	mohor	8115d 05h	/ethmac/tags/rel_7/rtl/verilog/eth_top.v