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Rev Log message Author Age Path
344 bit 9 in phy control register is self clearing olof 3963d 09h /ethmac/trunk/
343 Address miss should not be asserted on short frames olof 3967d 05h /ethmac/trunk/
342 Added cast to avoid inequality when comparing different data types olof 3967d 05h /ethmac/trunk/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 3967d 05h /ethmac/trunk/
340 Don't fail if log dir already exists olof 3968d 03h /ethmac/trunk/
339 Added basic support for Icarus Verilog olof 3969d 02h /ethmac/trunk/
338 root 4761d 08h /ethmac/trunk/
335 New directory structure. root 4818d 13h /ethernet/trunk/
334 Minor fixes for Icarus simulator. igorm 6266d 15h /trunk/
333 Some small fixes + some troubles fixed. igorm 6267d 03h /trunk/
332 Case statement improved for synthesys. igorm 6280d 08h /trunk/
331 Tests for delayed CRC and defer indication added. igorm 6295d 10h /trunk/
330 Warning fixes. igorm 6295d 10h /trunk/
329 Defer indication fixed. igorm 6295d 11h /trunk/
328 Delayed CRC fixed. igorm 6295d 12h /trunk/
327 Defer indication fixed. igorm 6295d 12h /trunk/
326 Delayed CRC fixed. igorm 6295d 12h /trunk/
325 Defer indication fixed. igorm 6295d 12h /trunk/
323 Accidently deleted line put back. igorm 6592d 13h /trunk/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 6596d 08h /trunk/

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