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Rev Log message Author Age Path
344 bit 9 in phy control register is self clearing olof 3432d 19h /ethmac/trunk/
343 Address miss should not be asserted on short frames olof 3436d 15h /ethmac/trunk/
342 Added cast to avoid inequality when comparing different data types olof 3436d 15h /ethmac/trunk/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 3436d 15h /ethmac/trunk/
340 Don't fail if log dir already exists olof 3437d 13h /ethmac/trunk/
339 Added basic support for Icarus Verilog olof 3438d 12h /ethmac/trunk/
338 root 4230d 18h /ethmac/trunk/
335 New directory structure. root 4287d 23h /ethernet/trunk/
334 Minor fixes for Icarus simulator. igorm 5736d 01h /trunk/
333 Some small fixes + some troubles fixed. igorm 5736d 13h /trunk/
332 Case statement improved for synthesys. igorm 5749d 18h /trunk/
331 Tests for delayed CRC and defer indication added. igorm 5764d 20h /trunk/
330 Warning fixes. igorm 5764d 20h /trunk/
329 Defer indication fixed. igorm 5764d 21h /trunk/
328 Delayed CRC fixed. igorm 5764d 22h /trunk/
327 Defer indication fixed. igorm 5764d 22h /trunk/
326 Delayed CRC fixed. igorm 5764d 22h /trunk/
325 Defer indication fixed. igorm 5764d 22h /trunk/
323 Accidently deleted line put back. igorm 6061d 23h /trunk/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 6065d 18h /trunk/

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