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Rev Log message Author Age Path
368 dbg_dat0 only exist when `DEBUG_WISHBONE is set olof 4002d 01h /ethmac/trunk/
367 Remove Wishbone B3 define. For classic wishbone, these ports can just be ignored olof 4064d 22h /ethmac/trunk/
366 Readded eth_top.v with a deprecation warning olof 4189d 02h /ethmac/trunk/
365 Whitespace cleanup olof 4190d 01h /ethmac/trunk/
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4190d 23h /ethmac/trunk/
360 Added partial implementation of the debug register from ORPSoC olof 4192d 06h /ethmac/trunk/
359 Verilator linting fixes olof 4194d 09h /ethmac/trunk/
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4195d 23h /ethmac/trunk/
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4195d 23h /ethmac/trunk/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4196d 01h /ethmac/trunk/
355 Import Julius Baxter's verilator hints from ORPSoC olof 4196d 01h /ethmac/trunk/
354 Whitespace cleanup olof 4196d 02h /ethmac/trunk/
353 Inherit fixes for bit width of constants from ORPSoC olof 4198d 03h /ethmac/trunk/
352 Removed delayed assignments from rtl code olof 4202d 09h /ethmac/trunk/
351 Turn defines into parameters in eth_cop olof 4210d 23h /ethmac/trunk/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4211d 00h /ethmac/trunk/
349 Make all parameters configurable from top level olof 4212d 00h /ethmac/trunk/
348 Added option to dump VCD files olof 4212d 23h /ethmac/trunk/
347 Added information about running with Icarus Verilog olof 4213d 00h /ethmac/trunk/
346 Updated project location olof 4213d 02h /ethmac/trunk/
345 Temporarily disable failing tests olof 4213d 03h /ethmac/trunk/
344 bit 9 in phy control register is self clearing olof 4219d 06h /ethmac/trunk/
343 Address miss should not be asserted on short frames olof 4223d 01h /ethmac/trunk/
342 Added cast to avoid inequality when comparing different data types olof 4223d 02h /ethmac/trunk/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4223d 02h /ethmac/trunk/
340 Don't fail if log dir already exists olof 4223d 23h /ethmac/trunk/
339 Added basic support for Icarus Verilog olof 4224d 23h /ethmac/trunk/
338 root 5017d 04h /ethmac/trunk/
335 New directory structure. root 5074d 10h /ethernet/trunk/
334 Minor fixes for Icarus simulator. igorm 6522d 12h /trunk/

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