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Rev Log message Author Age Path
91 Comments in Slovene language removed. mohor 8072d 02h /ethmac/trunk/
90 casex changed with case, fifo reset changed. mohor 8072d 02h /ethmac/trunk/
89 TX_BD_NUM, MAC_ADDR0 and MAC_ADDR1 register description
mohor 8076d 00h /ethmac/trunk/
88 rx_fifo was not always cleared ok. Fixed. mohor 8081d 23h /ethmac/trunk/
87 Status was not latched correctly sometimes. Fixed. mohor 8082d 01h /ethmac/trunk/
86 Big Endian problem when sending frames fixed. mohor 8083d 08h /ethmac/trunk/
85 Log info was missing. mohor 8088d 18h /ethmac/trunk/
84 LinkFail signal was not latching appropriate bit. mohor 8088d 18h /ethmac/trunk/
83 MAC address recognition was not correct (bytes swaped). mohor 8088d 18h /ethmac/trunk/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8088d 20h /ethmac/trunk/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8088d 20h /ethmac/trunk/
80 Small fixes for external/internal DMA missmatches. mohor 8092d 22h /ethmac/trunk/
79 RetryCntLatched was unused and removed from design mohor 8092d 22h /ethmac/trunk/
78 WB_SEL_I was unused and removed from design mohor 8092d 22h /ethmac/trunk/
77 Interrupts changed mohor 8092d 22h /ethmac/trunk/
76 Interrupts changed in the top file mohor 8092d 22h /ethmac/trunk/
75 r_Bro is used for accepting/denying frames mohor 8092d 22h /ethmac/trunk/
74 Reset values are passed to registers through parameters mohor 8092d 22h /ethmac/trunk/
73 Number of interrupts changed mohor 8092d 23h /ethmac/trunk/
72 Retry is not activated when a Tx Underrun occured mohor 8097d 02h /ethmac/trunk/

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