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[/] [ethmac/] [trunk/] [bench/] [verilog/] - Rev 286

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Rev Log message Author Age Path
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 7629d 07h /ethmac/trunk/bench/verilog
281 Tests test_mac_full_duplex_receive 4-7 fixed to proper BD. mohor 7762d 03h /ethmac/trunk/bench/verilog
279 Underrun test fixed. Many other tests fixed. mohor 7763d 05h /ethmac/trunk/bench/verilog
274 Backup version. Not fully working. tadejm 7770d 23h /ethmac/trunk/bench/verilog
267 Full duplex control frames tested. mohor 7827d 02h /ethmac/trunk/bench/verilog
266 Flow control test almost finished. mohor 7832d 01h /ethmac/trunk/bench/verilog
263 test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL
FRM. AT 4 TX BD ( 10Mbps ) finished.
TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION
TURNED OFF AT ONE RX BD ( 10Mbps ) finished.
mohor 7832d 16h /ethmac/trunk/bench/verilog
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.
mohor 7833d 05h /ethmac/trunk/bench/verilog
254 Temp version. mohor 7834d 22h /ethmac/trunk/bench/verilog
252 Just some updates. tadejm 7835d 01h /ethmac/trunk/bench/verilog
243 Late collision is not reported any more. tadejm 7840d 05h /ethmac/trunk/bench/verilog
227 Changed BIST scan signals. tadejm 7867d 02h /ethmac/trunk/bench/verilog
223 Some code changed due to bug fixes. tadejm 7867d 05h /ethmac/trunk/bench/verilog
216 Bist signals added. mohor 7874d 05h /ethmac/trunk/bench/verilog
209 Just back-up; not completed testbench and some testcases are not
wotking properly yet.
tadejm 7876d 05h /ethmac/trunk/bench/verilog
194 Full duplex tests modified and testbench bug repaired. tadej 7895d 04h /ethmac/trunk/bench/verilog
192 Some additional reports added tadej 7897d 01h /ethmac/trunk/bench/verilog
191 Bug repaired in eth_phy device tadej 7897d 01h /ethmac/trunk/bench/verilog
189 Simple testbench that includes eth_cop, eth_host and eth_memory modules.
This testbench is used for testing the whole environment. Use tb_ethernet
testbench for testing just the ethernet MAC core (many tests).
mohor 7897d 02h /ethmac/trunk/bench/verilog
188 PHY changed. tadej 7897d 22h /ethmac/trunk/bench/verilog

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