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[/] [ethmac/] [trunk/] [bench/] [verilog/] - Rev 338

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Rev Log message Author Age Path
338 root 5470d 20h /ethmac/trunk/bench/verilog
335 New directory structure. root 5528d 01h /ethmac/trunk/bench/verilog
334 Minor fixes for Icarus simulator. igorm 6976d 03h /ethmac/trunk/bench/verilog
331 Tests for delayed CRC and defer indication added. igorm 7004d 22h /ethmac/trunk/bench/verilog
318 Latest Ethernet IP core testbench. tadejm 7336d 19h /ethmac/trunk/bench/verilog
315 Updated testbench. Some more testcases, some repaired. tadejm 7448d 22h /ethmac/trunk/bench/verilog
302 mbist signals updated according to newest convention markom 7498d 03h /ethmac/trunk/bench/verilog
299 Artisan RAMs added. mohor 7555d 23h /ethmac/trunk/bench/verilog
286 Define file in eth_cop.v is changed to eth_defines.v. Some defines were
moved from tb_eth_defines.v to eth_defines.v.
mohor 7623d 23h /ethmac/trunk/bench/verilog
281 Tests test_mac_full_duplex_receive 4-7 fixed to proper BD. mohor 7756d 19h /ethmac/trunk/bench/verilog
279 Underrun test fixed. Many other tests fixed. mohor 7757d 21h /ethmac/trunk/bench/verilog
274 Backup version. Not fully working. tadejm 7765d 15h /ethmac/trunk/bench/verilog
267 Full duplex control frames tested. mohor 7821d 19h /ethmac/trunk/bench/verilog
266 Flow control test almost finished. mohor 7826d 18h /ethmac/trunk/bench/verilog
263 test_mac_full_duplex_flow_control tests pretty much finished.
TEST 0: INSERT CONTROL FRM. WHILE TRANSMITTING NORMAL
FRM. AT 4 TX BD ( 10Mbps ) finished.
TEST 2: RECEIVE CONTROL FRAMES WITH PASSALL OPTION
TURNED OFF AT ONE RX BD ( 10Mbps ) finished.
mohor 7827d 09h /ethmac/trunk/bench/verilog
260 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame
finished.
mohor 7827d 21h /ethmac/trunk/bench/verilog
254 Temp version. mohor 7829d 15h /ethmac/trunk/bench/verilog
252 Just some updates. tadejm 7829d 17h /ethmac/trunk/bench/verilog
243 Late collision is not reported any more. tadejm 7834d 22h /ethmac/trunk/bench/verilog
227 Changed BIST scan signals. tadejm 7861d 18h /ethmac/trunk/bench/verilog

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