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[/] [ethmac/] [trunk/] [bench/] [verilog/] [tb_ethernet.v] - Rev 281

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Rev Log message Author Age Path
177 Bug in MIIM fixed. mohor 7927d 08h /ethmac/trunk/bench/verilog/tb_ethernet.v
170 Headers changed. mohor 7927d 10h /ethmac/trunk/bench/verilog/tb_ethernet.v
169 New testbench. Thanks to Tadej M - "The Spammer". mohor 7927d 10h /ethmac/trunk/bench/verilog/tb_ethernet.v
158 Typo fixed. mohor 7932d 06h /ethmac/trunk/bench/verilog/tb_ethernet.v
156 Valid testbench. mohor 7934d 11h /ethmac/trunk/bench/verilog/tb_ethernet.v
121 gsr added for use when ETH_XILINX_RAMB4 define is set. mohor 7979d 06h /ethmac/trunk/bench/verilog/tb_ethernet.v
117 Clock mrx_clk set to 2.5 MHz. mohor 7983d 08h /ethmac/trunk/bench/verilog/tb_ethernet.v
116 Testing environment also includes traffic cop, memory interface and host
interface.
mohor 7983d 08h /ethmac/trunk/bench/verilog/tb_ethernet.v

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