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Rev Log message Author Age Path
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4216d 23h /ethmac/trunk/rtl/
349 Make all parameters configurable from top level olof 4217d 23h /ethmac/trunk/rtl/
346 Updated project location olof 4219d 01h /ethmac/trunk/rtl/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4229d 01h /ethmac/trunk/rtl/
338 root 5023d 03h /ethmac/trunk/rtl/
335 New directory structure. root 5080d 09h /ethmac/trunk/rtl/
333 Some small fixes + some troubles fixed. igorm 6528d 23h /ethmac/trunk/rtl/
332 Case statement improved for synthesys. igorm 6542d 04h /ethmac/trunk/rtl/
330 Warning fixes. igorm 6557d 06h /ethmac/trunk/rtl/
329 Defer indication fixed. igorm 6557d 07h /ethmac/trunk/rtl/
328 Delayed CRC fixed. igorm 6557d 07h /ethmac/trunk/rtl/
327 Defer indication fixed. igorm 6557d 08h /ethmac/trunk/rtl/
326 Delayed CRC fixed. igorm 6557d 08h /ethmac/trunk/rtl/
325 Defer indication fixed. igorm 6557d 08h /ethmac/trunk/rtl/
323 Accidently deleted line put back. igorm 6854d 08h /ethmac/trunk/rtl/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 6858d 03h /ethmac/trunk/rtl/
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 6858d 07h /ethmac/trunk/rtl/
317 Multicast detection fixed. Only the LSB of the first byte is checked. igorm 6898d 09h /ethmac/trunk/rtl/
312 Corrected address mismatch for xilinx RAMB4_S8 model which has wider address than RAMB4_S16. tadejm 7001d 06h /ethmac/trunk/rtl/
306 Lapsus fixed (!we -> ~we). simons 7002d 04h /ethmac/trunk/rtl/

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