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[/] [ethmac/] [trunk/] [rtl/] - Rev 364

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Rev Log message Author Age Path
364 Renamed eth_top.v to ethmac.v to fit better into OpenCores structure olof 4580d 04h /ethmac/trunk/rtl/
360 Added partial implementation of the debug register from ORPSoC olof 4581d 11h /ethmac/trunk/rtl/
359 Verilator linting fixes olof 4583d 13h /ethmac/trunk/rtl/
358 Rename do to dato to avoid conflict with SystemVerilog (inherited from Julius Baxter's ORPSoC version olof 4585d 03h /ethmac/trunk/rtl/
357 Bit width, assignment and white space fixes by Julius Baxter, inherited from ORPSoC olof 4585d 04h /ethmac/trunk/rtl/
356 Rename eth_defines.v to ethmac_defines.v to fit better into OpenCores project structure olof 4585d 05h /ethmac/trunk/rtl/
355 Import Julius Baxter's verilator hints from ORPSoC olof 4585d 06h /ethmac/trunk/rtl/
354 Whitespace cleanup olof 4585d 07h /ethmac/trunk/rtl/
353 Inherit fixes for bit width of constants from ORPSoC olof 4587d 08h /ethmac/trunk/rtl/
352 Removed delayed assignments from rtl code olof 4591d 14h /ethmac/trunk/rtl/
351 Turn defines into parameters in eth_cop olof 4600d 04h /ethmac/trunk/rtl/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4600d 04h /ethmac/trunk/rtl/
349 Make all parameters configurable from top level olof 4601d 05h /ethmac/trunk/rtl/
346 Updated project location olof 4602d 07h /ethmac/trunk/rtl/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4612d 07h /ethmac/trunk/rtl/
338 root 5406d 09h /ethmac/trunk/rtl/
335 New directory structure. root 5463d 14h /ethmac/trunk/rtl/
333 Some small fixes + some troubles fixed. igorm 6912d 04h /ethmac/trunk/rtl/
332 Case statement improved for synthesys. igorm 6925d 10h /ethmac/trunk/rtl/
330 Warning fixes. igorm 6940d 12h /ethmac/trunk/rtl/

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